(1) Field of the Invention
The present invention relates to the lithographic methods in the manufacture of integrated circuits in general, and in particular, to a method of compensating for optical proximity effect through the application of over-correction of electron beam proximity effect.
(2) Description of the Related Art
The manufacture of integrated circuits involve the forming of myriad of components on a semiconductor substrate, such as a wafer of silicon. The components may include devices themselves, metal lines, metal plugs, and other features that, together, comprise the circuits. The patterns that define such regions of components are created by lithographic processes. That is, layers of photoresist materials are first spin-coated onto the wafer substrate. Next, the resist layer is selectively exposed to a form of radiation, such as ultraviolet light, electrons, or x-rays. An exposure tool and mask, or data tape in electron beam lithography, are used to effect the desired selective exposure. The patterns in the resist are formed when the wafer undergoes the subsequent "development" step. The areas of resist remaining after development protect the substrate regions which they cover. Locations from which resist has been removed can be subjected to a variety of additive (deposition) or subtractive (etch) processes that transfer the pattern onto the substrate surface.
Because of the many transfer steps that are involved from the time the patterns are generated in a computer-using computer aided design (CAD) techniques- to the time the patterns are actually formed in a semiconductor wafer, the images formed on the device substrate deviate from their ideal dimensions and shape as represented by the computer images. These deviations depend on the characteristics of the patterns as well as on the various process conditions. Because these deviations can significantly effect the performance of the semiconductor device, workers in the field have pursued many different approaches to correct such deviations by compensating for those deviations at certain process steps. Usually, and as described more fully below, the corrective compensation is introduced either into the CAD (Computer Aided Design) generated patterns in the beginning, or at the masking process step where mask patterns are selectively biased, to compensate for the pattern distortions occurring during wafer processing. The term Optical Proximity Correction (OPC) is commonly used to describe the latter technique of selective mask biasing. The concept of biasing patterns to compensate for image transfer distortions has been commonly applied to E-beam lithography to counteract the effects of back scattered electrons, both in the writing of photomasks and in direct wafer writing operations. It is disclosed in the present invention, a method of compensating for optical proximity effect through the application of over-correction for electron beam proximity effect.
Compensation schemes of prior art have been primarily directed towards manipulating the computer images by adding, subtracting, or biasing design features as discussed by Liebmann in U.S. Pat. No. 5,657,235. In a typical compensation scheme, CAD data in a hierarchical format using a discrete design grid is created which represents the ideal device patterns. Compensation information based on known patterning distortions is defined in a "lookup" table or convolution function. Manipulation of the CAD data based on the distortion knowledge is performed with an optical proximity correction (OPC) engine which outputs biased CAD data. The output data contains reduced hierarchy and design grid in order to allow for the appropriate compensations. The biased CAD data is then converted to a flat format for photomask fabrication. Realizing that modifications of the design with computer programs can sometimes over-burden computer systems, Liebmann provides a method of correcting pattern sizes and shapes by assigning relative energy levels to the radiation used during the mask process, rather than physically manipulating feature sizes in the computer layout design. As it will be known to those skilled in the art, many parameters effect the size of images created during the mask process, such as incident energy level, duration of development, or duration of the etch step employed. Processes such as development or etch effect all regions of the photomask and are used to adjust the average size of all the features contained in the design. Energy level or dose is controlled by the exposure system which can selectively apply an energy level to any particular pattern needing compensation. Thus, Liebmann codes relative dose information onto the design data thereby compensating specific mask feature sizes through dose offsets during the mask exposure process. These offsets are given relative to a nominal dose that has been established for a given exposure system and patterning material. In a different U.S. Pat. No. 5,740,068, Liebmann also discloses a method for performing optical proximity correction on the edge portions of the elements that affect the operational performance of the integrated circuits.
Just as with optical proximity effect, there have been numerous prior art proposals for correcting for E-beam proximity effect. As is well known, electron-beam provides radiant energy of shorter wavelengths than the relatively long wavelengths of visible and ultraviolet range, and hence making possible masks with finer resolution towards the implementation of even higher scale integration of semiconductor circuits. While E-beam lithography process is capable of superior feature resolution, that advantage is mitigated by the E-beam proximity effect caused by the back-scattering of electrons as the electrons impact the radiation sensitive resist, the underlying layers and the substrate. The back-scattering increases the effective exposure of portions of the resist layer, causing undesirable deviations from the original feature size. The back-scattering can be especially troublesome in closely-packed features such as in highly dense applications. This is illustrated in a top view of a substrate in FIG. 1b, which shows the variation in the width of stripes formed by scanning an E-beam across a substrate of FIG. 1a. In the cross-sectional view of the same substrate in FIG. 1a, elements (30a)-(30e) represent the instantaneous positions of the E-beam as it is being scanned across the surface of an e-beam sensitive resist layer (20) formed over the upper surface (12) of a semiconductor substrate (10) through methods well known in the art. Element (35c) is the path along which electrons travel or scatter forward corresponding to the position of the E-beam line at (30c). Path (35c) travels goes through the resist layer (20) and into the substrate (10). The E-beam at other positions similarly penetrate into the resist layer and the substrate. As the E-beam impacts atoms within the resist layer and within the crystal structure of substrate (10), a certain percentage of electrons are back-scattered to the resist layer (20) as suggested by arrows (37c). After developing the resist, it is found that the forward-scattered and back-scattered electrons together create an E-beam proximity effect (EPC) where the resulting stripes (20a)-(20e) shown in FIG. 1b have differing widths even though each E-beam location on the resist received the same energy. More specifically, centrally exposed stripe (20c) has the greatest width (W.sub.1), while the adjacent stripes (20b), (20a) and (20d), (20e) further from the center have correspondingly smaller widths (W.sub.2) and (W.sub.3), as shown in FIG. 1b. This can be explained by the observation that the resist regions closer to the central area receive more back-scattered electrons than regions which are more peripheral with less surrounding area.
The additive proximity effect of the forward and back scattered electrons can also be seen by noting the equation (see, for example, Wolf, et al., "Silicon Processing for the VLSI Era," vol. 1, Lattice Press, Sunset Beach, Calif., 1990, p. 500) giving the energy density distribution in the resist as: EQU E(r)=k{exp-(r/.sigma..sub.f).sup.2 +n(.sigma..sub.f /.sigma..sub.b).sup.2 exp-(r/.sigma..sub.b).sup.2 }
where k is a proportionality constant, n is the ratio of total energy deposited by the forward scattered electrons, .sigma..sub.f, .sigma..sub.b are the characteristic widths of the forward scattered and backward scattered Gaussian distribution, and r is the radial distance from the center of the E-beam spot. The parameters .sigma..sub.f and .sigma..sub.b, and n vary with energy, while .sigma..sub.b and n also vary with substrate material. The adjustment of these three parameters with exposure and substrate conditions is used for proximity effect corrections in device patterning, or writing. Plots of forward-scatter profile and back-scatter profile are shown in FIG. 2a while the proximity effect resulting from the interaction between forward-scattered electrons and back-scattered electrons is shown in FIG. 2b. In both FIGS. 2a and 2b, the electron scatter or exposure intensity is plotted along the vertical axis; forward-scatter, and back-scatter are referenced by numerals (50) and (60), respectively, while the combined energy distribution is referenced by (70). Element (80) represents the clear-out energy, or the amount of dosage required to completely expose and later develop the total thickness of the e-beam sensitive resist.
Watson in U.S. Pat. No. 5,736,281 takes advantage of the dose profile to correct for proximity effect. An uncorrected dose profile is obtained for the pattern features to be introduced into the layer of electron beam sensitive material, including a determination of the clearing dose for the electron beam sensitive resist and the dose height for each edge of the pattern feature. Thereafter the incident dose of exposure energy for introducing an image of the pattern into a layer of electron beam sensitive material is adjusted by designating the clearing dose for each edge of the pattern feature as a function of the dose height. The uncorrected dose profile for determining the dose height and the clearing dose is optionally obtained from a calibration step. Each feature is optionally partitioned into a plurality of subshapes and the incident dose of exposure energy is then adjusted f or each edge of each subshape by designating the clearing dose for each edge of each subshape as a function of the dose height.
In addition to the compensation methods of adjusting the exposure dose for each subdivided shape, or adjusting the size of the design pattern, there is the method of chemically mobilizing the molecules of the e-beam resist so as to compensate for the exposure size variations caused by the proximity effect, as disclosed by Liu in U.S. Pat. No. 4,988,284.
Gaston, in U.S. Pat. No. 5,532,496, on the other hand, uses a combination of a scattering mask and a scattering filter to add automatic leveling background exposure and thus provide uniform contrast across the entire exposure pattern to compensate for the nonuniform resist exposure due to electron back-scattering from the underlying substrate during E-beam exposure. In another related application of the e-beam, Meisburger, et al., disclose in U.S. Pat. No. 5,665,968 an apparatus for inspecting optical masks using electron beam, and a method for automatically inspecting an optical mask in a separate U.S. Pat. No. 5,717,204.
Prior art addresses successfully the problems of optical proximity effect, and e-beam proximity effect; but individually and separately. Inasmuch as the advent of ultra large scale integration of circuits requires higher resolution processes, and that e-beam technology is poised to become one of the leading technologies to provide solutions for better resolution, it is prudent to take advantage of the existing compensation techniques for e-beam proximity effect and incorporate into it optical proximity effect as well as other general process effects (PE), such as due to etching, for example. In other words, what is needed is a method of covering all required process corrections by electron-beam correction, preferably at the time of the manufacturing of the mask, such as the binary mask (BIM) or the attenuated phase shifting mask (APSM), which is disclosed in the embodiments of this invention.